1. Field of the Invention
The present invention relates to a semiconductor structure with increased breakdown voltage across a pn junction, which the semiconductor structure comprises.
2. Description of the Prior Art
One of the main demands on semiconductor structures in modern microelectronic circuits is that the semiconductor structures ideally have a desired breakdown strength matched with a good frequency characteristic, such as a high cutoff frequency, for a respective application.
Particularly in modern BiCMOS technologies, where a collector of a bipolar transistor is laterally connected via a heavily doped subcollector (buried layer), which is buried by a collector epitaxy, often mutually exclusive demands are made on a bipolar process module. On the one hand, an integration of a bipolar transistor, which is as fast as possible, is required for low operating voltages, on the other hand, usually, bipolar transistors are required, which have a high breakdown voltage but only need to achieve a lower high frequency performance. For a fast transistor (HF), a collector epitaxial layer should be as thin as possible, so that a collector terminal resistor as well as the minority charge carrier in the collector becomes low and thus the RF performance high. For the transistor with a high breakdown voltage (HV), however, the collector epitaxy should be thick, so that the base collector space charge zone can extend widely and thus the required breakdown voltage is achieved. For that reason, a doping of the collector epitaxy is low, for example <1 E 16 cm−3.
Normally, both the thickness and the dopant of the epitaxial layer (collector epitaxy) is determined such that the required breakdown voltage for the HV transistor is ensured. Since the low doping for the HF transistor does not allow sufficiently high collector currents and thus the HF performance suffers as well, since a maximum cutoff frequency ft (transit frequency) depends in a linear way on a maximum collector current Ic, where the so-called Kirk effect occurs, often a so-called SIC (SIC=selectively implanted collector) is implanted in a conventional HF transistor.
In FIG. 8, a conventional integration of an HF and an HV bipolar transistor is illustrated. Heavily doped subcollectors 803 and 804 of the HV and HF transistor (buried layer) are disposed on a substrate 801. The HF transistor disposed on the left hand side of the dotted line further comprises a first SIC 805 as well as a second SIC 807. Both the first SIC and the second SIC are buried in a collector epitaxy 809. Further, a base 811 is disposed on the first SIC 805, which can, for example, be connected to a wiring level with the help of a base terminal layer 813. An emitter layer 815 is disposed on the base 811, which is contacted via an emitter contact. Further, an isolation layer 817 as well as an insulating spacer in the emitter window are disposed on the base terminal layer 813. Both layers serve for the electrical insulation between the emitter and the base terminal. Oxide layers 819, for example, are further formed below the base terminal layer. The subcollector 804 can be contacted from the top via a further terminal 820. The buried layers of the individual transistors are insulated against one another by a deep trench 823. However, they can also be insulated against one another by a pn insulation.
In contrast to the HF transistor, the HV transistor, which is disposed on the right hand side of the dotted line, has no first and no second SIC. Thereby, the subcollector 803 can for example be provided with a voltage via a further terminal 821. If the HF and HV transistors illustrated in FIG. 8 are, for example, npn transistors, the subcollector 803 is, for example heavily n doped, while the collector epitaxial layer 809 is less n doped. Thereby, the second SIC 807 and the first SIC 805 are also n doped, wherein a doping concentration of the first and the second SIC is higher than of the collector epitaxial layer and lower than of the subcollector.
An implantation of an SIC leads to a volume doping (about 1 E 17 cm−3) which is increased in comparison to the dopant of the collector epitaxy (epidoping). When reaching the breakdown voltage, however, the base collector space charge zone of the HF transistor does not extend the buried subcollector 803, due to the high epithickness and the doping increased by the SIC implantation. Thus, the collector current has to flow through the relatively high impedance area of the SIC between the end of the space charge zone and the beginning of the subcollector. For that reason, this area is often doped by a second SIC implantation 807, as it is illustrated in FIG. 8, which can then be optimized as retrograde profile. A disadvantage is, that the HF performance of the transistor is affected thereby, since, on the one hand, the doping and thus a conductivity of the SIC is significantly lower in comparison to the subcollector. On the other hand, the SIC implantation cannot nearly achieve a dopant profile as high as by an epitaxy, so that a collector resistance is higher than with a minimal possible epithickness. All in all, the HF transistor does not achieve the best possible performance, which would be possible in this technology generation, since, for example, the already mentioned increased collector resistance as well as the higher minority charge carrier storage lower the cutoff frequency of the HF transistor.
It is another disadvantage of the approach illustrated in FIG. 8 that the HF properties of the HF transistor starting from the HV transistor, whose collector epitaxy is optimally designed for increasing the breakdown voltage, are to be improved by an introduction of one or several SICs, respectively. Since the HF properties of the HV transistor are of secondary importance in comparison to the demand on the breakdown voltage when forming the collector epitaxy 809, the collector epitaxy has to be thick, and therefore, the properties of the HF transistor formed in this epitaxial layer, have to be improved by introducing one or several SICs 805 and 807. This leads to a rise in costs of the production process, since the first and the second SIC have to be formed, for example, by an implantation of a dopant.
It is another disadvantage of the approach illustrated in FIG. 8, that a dissipation power of the HF transistor is increased due to the SICs 805 and 807, as well as the already mentioned increased collector resistance. If a microelectronic circuit comprises a plurality of HF transistors, as illustrated in FIG. 8, this leads to a significant rise in power consumption as well as possibly a heat built up, whereby the costs of the operation of such a circuit are increased.
Another disadvantage of the transistors according to the prior art illustrated in FIG. 8 is, that due to the thickness of the collector epitaxy 809 required for achieving a predetermined breakdown voltage, the dimensions, for example in vertical direction, of a transistor produced in such a way increase, since the thickness of the collector epitaxy 809 has to be chosen large for achieving a high breakdown voltage strength. The epitaxy thickness depends on the breakdown voltage of the HV transistor. This results in another disadvantage, that with larger thickness of the collector epitaxial layer 809 for achieving a higher breakdown voltage, the HF performance of the HF transistor is inevitably decreased, since the SICs 805 and 807 inevitably have to be longer, or a third SIC is inserted, whereby the already mentioned collector resistance rises further.
In the document of K. O. Kenneth and B. W. Scharf: “Effects of Buried Layer Geometry on Characteristics of Double Polysilicon Bipolar Transistor” a bipolar transistor with a higher breakdown voltage is described, where a subcollector consists of segmented parts.